Last month, TSMC started R&D on the futuristic 2nm process node at its Hsinchu facility in Taiwan. The Taiwanese silicone maker has now quietly announced performance-enhanced versions of its original 7nm and 5nm manufacturing processes. The new processor designs will offer more power and will consume lower power in the same form factor as TSMC expects more demand for 7nm and 5nm chips in the near future.
How do the new enhanced process nodes compare to its predecessors?
The new performance-enhanced processes include the 7nm-based N7P (an upgrade over the current N7 process) and 5nm-based N5P (N5’s successor). The N7P process will be able to offer a 7 percent boost in performance while lowering the power consumption by 10 percent, says WikiChip.
N7P appears to be the same 7-nanometer N7+ process which went into mass production earlier this May. At that time, the company disclosed that the yield from the 7nm+ EVU process reached that of the original 7nm process thus increasing the capacity of the 7nm process chips. The new 7nm process technology is already available to TSMC clients.
As for the next generation 5nm process, the N5P will be able to offer 7 percent faster performance and 15 percent more battery life compared to its original N5 process. It’s unclear which one out of the N5 and N5P has been targeted for mass production in the first half of 2020, as was revealed by TSMC CEO CC Wei earlier in July. Or maybe, both the N5 and N5P will coexist in different segments of mobile devices.
in April, TSMC announced the release of its new 5nm chipset design infrastructure for high-end phones including the 2020 iPhones. That 5nm process node was touted to be made through a EUV lithography process to offer superior SRAM with 15 percent speed boost on an ARM Cortex-A72 core performance with a 1.8X logic density and reduction in analogue area.
What else is TSMC working on?
TSMC has also announced the development of its 3nm process node, which is expected to be introduced sometime in 2022. While revealing its Financial results for Q2 2019, TSMC made it clear that the development of its future 3nm process technology is “going well” and that it has already started talks with its early clients.
TSMC CEO CC Wei said “On N3, the technology development progress is going well, and we are already engaging with the early customers on the technology definition. We expect our 3-nanometer technology to further extend our leadership position well into the future”.
The semiconductor company plans to meet improved levels of demand for 5nm and 7nm chip processes by hiring more engineers and operators to expand its expertise in equipment, R&D, production line and process integration. TSMC expects to recruit at least 3,000 individuals who will help drive the business of product launches in the future.