Samsung’s upcoming 3nm will be manufactured through a gate-all-around (GAA) process which will reduce the size of the system-on-chips by up to 45 percent. The reduced size of the chip translates to an increase in performance which is slated to be close to 35 percent and lower the power consumption by up to 50 percent.
At its Foundry Forum 2019 event in California, Samsung showcased its 3nm process for upcoming mobile chips, significantly beating its competition which is stuck at the development of 5nm chips.
Samsung’s upcoming 3nm will be manufactured through a gate-all-around (GAA) process which will reduce the size of the system-on-chips by up to 45 percent.
The reduced size of the chip translates to a thinner form factor as weak as an increase in performance which is slated to be close to 35 percent. Additionally, the 3nm mobile chips from Samsung will also help lower the power consumption of the processor by up to 50 percent.
The GAA process will be based on a Multi-Bridge-Channel FET (MBCFET) which Samsung patented using a stacked nanosheet architecture. This design will help Samsung enable more current per stack in contrast to a conventional FinFET process.
The first 3nm chips, designed for smartphones, is slated to be tested by 2020 with mass production to happen sometime around 2021. Samsung is also expected to announce the complete development of its 5nm FinFET process by the end of 2019 with volume manufacturing by the first half of next year. There will also be a 4nm-based chipset which is set for completion this year as well.
While we’re still two years away from seeing a 3nm chip, one thing’s for sure is that 3nm manufacturing will be an expensive affair, much like what the upcoming 5nm chips are believed to be. We’ll know more as we head toward the development.
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